A43L2616A Datasheet | AMIC Technology

Feature JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks / Pulse RAS MRS cycle with address key programs - CAS Latency (2,3) - Burst Length (1,2,4,8 & full page) - Burst Type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Clock Frequency: 166MHz @ CL=3 143MHz @ CL=3 1M X 16 Bit X 4 Banks Synchronous DRAM Burst Read Single-bit Write operation DQM for masking Auto & self refresh 64ms refresh period (4K cycle) mercial Temperature Operation : 0°C~70°C Industrial Temperature Operation : -40 ° C~85 ° C for - U grade 54 Pin TSOP (II) and 54 Balls CSP (8mm x 8mm) General Description The A43L2616A is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 X 1,048,576 words by 16 bits, fabricated with AMIC’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications. Pin Configuration TSOP (II) VDDQ VSSQ DQ14 DQ13 DQ11 UDQM VDDQ VSSQ DQ15 DQ12 DQ10 DQ8 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 A43L2616AV 1 VDD 2 DQ0 3 VDDQ 4 DQ1 5 DQ2 6 VSSQ 7 DQ3 8 DQ4 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 VSSQ A10/AP VDD LDQM VDDQ VDD WE CAS RAS CS BS0 BS1 A0 A1 DQ5 DQ6 DQ7 A2 A3 PRELIMINARY (November, 2004, Version...