AMIC Technology A63L73321
The A63L73321 is a high-speed, low-power SRAM containing 4,194,304 bits of bit synchronous memory, organized as 131,072 words by 32 bits. The A63L73321 combines advanced synchronous peripheral circuitry, 2-bit burst control, input registers, output buffer and a 128K X 32 SRAM core to provide a wide range of data RAM applications. The positive edge triggered single clock input (CLK) controls all synchronous inputs passing through the registers.
| Part No. |
A63L73321 |
| Datasheet |
A63L73321
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| Manufacturer |
 AMIC Technology |
| Description |
128K X 32 Bit Synchronous High Speed SRAM |
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FEATURES
n n n n n Fast access times: 12ns at 66MHz Single +3.3V+10% or +3.3V-5% power supply Synchronous burst function Individual Byte Write control and Global Write Double-cycle enable, single-cycle deselect n Three separate chip enables allow wide range of options for CE control, address pipelining n Selectable BURST mode n SLEEP mode (ZZ pin) provided n Available in 100-pin LQFP package GENERAL DESCRIPTION
Synchronous inputs include all addresses (A0 A16), all data inputs (I/O1 - I/O32), active LOW chip enable ( CE ), two additional chip enables (CE2, CE2 ), burst control inputs ( ADSC , ADSP , ADV ), byte write enables ( BWE , BW1 , BW2 , BW3 , BW4 ) and Global Write ( GW ). Asynchronous inputs include output enable ( OE ), clock (CLK), BURST mode (MODE) and SLEEP mode (ZZ). Burst operations can be initiated with either the address status processor ( ADSP ) or address status controller ( ADSC ) input pin. Subsequent burst sequence burst addresses can be internally generated by the A63L73321 and controlled by the burst advance ( ADV ) pin.
