LP61L256B Overview
The LP61L256B is a high-speed, low-power 262,144-bit static random access memory organized as 32,768 words by 8 bits that operates on a single 3.3V power supply. Input and three-state outputs are TTL patible and allow for direct interfacing with mon system bus structures. Minimum standby power is drawn by this device when CE is at a high level, independent of the other input levels.