Datasheet Summary
LP62S16512-I Series
Preliminary
Document Title 512K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History
Rev. No.
512K X 16 BIT LOW VOLTAGE CMOS SRAM
History
Add Product Family and 55ns specification
Issue Date
March 20, 2002
Remark
Preliminary
PRELIMINARY
(March, 2002, Version 0.2)
AMIC Technology, Inc.
LP62S16512-I Series
Preliminary
Features n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max.) n Current: Very low power version: Operating: 50mA (max.) Standby: 20µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-patible n mon I/O using three-state output n Data retention voltage: 2.0V (min.) n Available...