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LP62S16512-T - 512K X 16 BIT LOW VOLTAGE CMOS SRAM

Datasheet Summary

Description

The LP62S16512-T is a low operating current 8,388,608bit static random access memory organized as 524,288 words by 16 bits and operates on low power voltage from 2.7V to 3.6V.

It is built using AMIC's high performance CMOS process.

Features

  • n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max. ) n Current: Very low power version: Operating: 50mA (max. ) Standby: 20µA (max. ) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2.0V (min. ) n Available in 48-ball CSP (8×10mm) packages 512K X 16 BIT LOW.

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Datasheet Details

Part number LP62S16512-T
Manufacturer AMIC Technology
File Size 150.99 KB
Description 512K X 16 BIT LOW VOLTAGE CMOS SRAM
Datasheet download datasheet LP62S16512-T Datasheet
Additional preview pages of the LP62S16512-T datasheet.

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Full PDF Text Transcription

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LP62S16512-T Series Preliminary Document Title 512K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.2 512K X 16 BIT LOW VOLTAGE CMOS SRAM History Add Product Family and 55ns specification Issue Date March 20, 2002 Remark Preliminary PRELIMINARY (March, 2002, Version 0.2) AMIC Technology, Inc. LP62S16512-T Series Preliminary Features n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max.) n Current: Very low power version: Operating: 50mA (max.) Standby: 20µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2.0V (min.
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