AT32M412 Datasheet | ARTERY

Features - Core: ARM® 32-bit Cortex®-M4 CPU with FPU - 180 MHz maximum frequency, with a memory protection unit (MPU), single-cycle multiplication and hardware division - Floating point unit (FPU) - DSP instructions - Memories - 64 to 128 Kbytes of Flash memory - 28 Kbytes of boot memory used as a Bootloader or as a general instruction/data memory (one-time configurable) - 1 Kbyte of OTP memory - s Lib: configurable part of main Flash as a library area with code executable but secured, non-readable - 16 Kbytes of SRAM - Power control (PWC) - 2.4 to 3.6 V supply - Power-on reset (POR), low voltage reset (LVR), and power voltage monitoring (PVM) - Low power modes: Sleep, Deepsleep and Standby modes, with 4 WKUP pins used for Standby mode wakeup - 20x 32-bit battery powered registers (BPR) - Clock and reset management (CRM) - 4 to 25 MHz crystal (HEXT) - 48 MHz internal factory-trimmed high speed clock (HICK), ±1 % accuracy at 25 °C and ±2.5% accuracy at -40 °C to +105 °C - 32 k Hz crystal (LEXT) - Low speed internal clock (LICK) - Analog - 2x 12-bit 2.5 MSPS A/D converters, up to 18 external input channels; internal channels connected with OP; each channel has independent data register - Temperature sensor (VTS) and internal reference voltage (VINTRV) - 2x 6-bit D/A converters connected with CMP and OP - 2x parators (CMP) with output blanking feature - 4x operational amplifiers (OP), 8.5 MHz bandwidth, support PGA mode, with built-in clamping diode for input - DMA - 1x 7-channel DMA controller with flexible mapping capability - Up to 46 fast GPIOs - All mappable on 16 external interrupts (EXINT) - Almost all 5 V-tolerant - Up to 11 timers (TMR) - 1x 16-bit 8-channel advanced timer, including 4 pairs of plementary PWM outputs with dead-time generator and emergency brake - Up to 5x 16-bit general-purpose timers, each with up to 4 IC/OC/PWM or pulse counter and incremental encoder input - 2x 16-bit basic timers - 2x watchdog timers (general WDT and windowed WDT) - Sys...