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89C51CC01 - T89C51CC01

General Description

The T89C51CC01 is the first member of the CANaryTM family of 8-bit microcontrollers dedicated to CAN network applications.

In X2 mode a maximum external clock rate of 20 MHz reaches a 300 ns cycle time.

Key Features

  • www. DataSheet4U. com 80C51 Core Architecture 256 Bytes of On-chip RAM 1K Bytes of On-chip ERAM 32K Bytes of On-chip Flash Memory.
  • Data Retention: 10 Years at 85°C Read/Write Cycle: 10K 2K Bytes of On-chip Flash for Bootloader 2K Bytes of On-chip EEPROM Read/Write Cycle: 100K 14-sources 4-level Interrupts Three 16-bit Timers/Counters Full Duplex UART Compatible 80C51 Max.

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Other Datasheets by Atmel (now Microchip Technology)

Part Number Description
89C5122 AT89C5122
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89C51ED2 AT89C51ED2
89C51RC AT89C51RC

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Features • • • • • • • • • • • • www.DataSheet4U.com 80C51 Core Architecture 256 Bytes of On-chip RAM 1K Bytes of On-chip ERAM 32K Bytes of On-chip Flash Memory – Data Retention: 10 Years at 85°C Read/Write Cycle: 10K 2K Bytes of On-chip Flash for Bootloader 2K Bytes of On-chip EEPROM Read/Write Cycle: 100K 14-sources 4-level Interrupts Three 16-bit Timers/Counters Full Duplex UART Compatible 80C51 Maximum Crystal Frequency 40 MHz – In X2 Mode, 20 MHz (CPU Core, 40 MHz) Five Ports: 32 + 2 Digital I/O Lines Five-channel 16-bit PCA with: – PWM (8-bit) – High-speed Output – Timer and Edge Capture Double Data Pointer 21-bit WatchDog Timer (7 Programmable Bits) A 10-bit Resolution Analog to Digital Converter (ADC) with 8 Multiplexed Inputs Full CAN Controller: – Fully Compliant with CAN Rev2.