AT61162E Datasheet | Atmel

Features - - - - - - - - - - - .. Organized as 2M x 8 bits Single 3.3V Power Supply Stacks of 16 SRAM 128K x AT65609E Die Access Time: 40 ns read, 35 ns write Very Low Power Consumption - Active: 130 m W (Typ) - Standby: 1 m W (Typ) TTL-patible Inputs and Outputs Die Designed on 0.35 Micron Process No Single Event Latch-up below a LET Threshold of 80 Me V/mg/cm2 Tested up to a Total Dose of 200 krads (Si) according to MIL STD 883 Method 1019 Wide Temperature Range -55°C to +125°C Built by 3D+ pany, using 3D+ Die Stacking Technology and Tested by Atmel Description The AT61162E is a Rad Hard module, highly-integrated and very low-power CMOS static RAM organized as 2M x 8 bits. It is organized with 16 banks of 1 Mbit. Each bank has a 8-bit interface and is selected with 16 specific CS: 0 - 15. Banks are selectable by pairs with 8 specific BS: 0 - 7. This module takes full benefit of the 3D+ cube technology, and it is assembled by 3D+ and tested by Atmel, using Atmel 65609E 1-Mbit SRAM die: it is built with 8 layers, each one housing 2 dies. 10 n F decoupling capacitors are embedded for each memory die. This module brings the solution to applications where fast puting is as mandatory as low power consumption, for example: space electronics, portable instruments, or embarked systems. AT61162E is processed according to the methods of the latest revision of the MIL PRF 38535, QML N (QML Q counterpart for plastic). The package is a 64 gull wing pins dual in line, 11 mm wide, 28 mm long and 14.3 mm height and 0.8 mm pin pitch. Rad Hard 2-Mbit x 8 SRAM Cube AT61162E 4157E- AERO- 07/05 Block Diagram .. CS0.0 CS0.1 BS0 CS1.0 CS1.1 BS1 CS7.0 CS7.1 BS7 Bank 0 I/O (0:7) A (0:16) WE OE I/O (0:7) A (0:16) WE OE I/O (0:7) A (0:16) WE OE CS1 CS2 Chip 0 Chip 1 CS1 CS2 Bank 1 I/O (0:7) A (0:16) WE OE Chip 1 CS1 CS2 Bank 7 I/O (0:7) A (0:16) WE OE Chip 1 CS1 CS2 I/O (0:7) A (0:16) WE OE CS1 CS2 Chip 0 I/O (0:7) A (0:16) WE OE CS1 CS2 Chip 0 Pin Configuration CS 7.0 CS 6.0 CS 5.0...