AT91CAP9SC500A Datasheet | Atmel

.. Features - Incorporates the ARM926EJ-S™ ARM® Thumb® Processor - DSP Instruction Extensions, ARM Jazelle® Technology for Java® Acceleration - 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer - 220 MIPS at 200 MHz - Memory Management Unit - Embedded ICE™ In-circuit Emulation, Debug munication Channel Support Additional Embedded Memories - One 32 Kbyte Internal ROM, Single-cycle Access at Maximum Matrix Speed - One 32 Kbyte Internal SRAM, Single-cycle Access at Maximum Matrix Speed External Bus Interface (EBI) - EBI Supports Mobile DDR, SDRAM, Low Power SDRAM, Static Memory, Synchronous Cellular RAM, ECC-enabled NAND Flash and pact Flash® Metal Programmable (MP) Block - 500,000 Gates/250,000 Gates Metal Programmable Logic (through 5 Metal Layers) for AT91CAP9SC500A/AT91CAP9SC250A Respectively - Ten 512 x 36-bit Dual Port RAMs - Eight 512 x 72-bit Single Port RAMs - High Connectivity for Up to Three AHB Masters and Four AHB Slaves - Up to Seven AIC Interrupt Inputs - Up to Four DMA Hardware Handshake Interfaces - Delay Lines for Double Data Rate Interface - UTMI+ Full Connection - Up to 77 Dedicated I/Os LCD Controller - Supports Passive or Active Displays - Up to 24 Bits per Pixel in TFT Mode, Up to 16 Bits per Pixel in STN Color Mode - Up to 16M Colors in TFT Mode, Resolution Up to 2048x2048, Supports Wider Screen Buffers Image Sensor Interface - ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate - 12-bit Data Interface for Support of High Sensibility Sensors - SAV and EAV Synchronization, Preview Path with Scaler, YCb Cr Format USB 2.0 Full Speed (12 Mbits per second) OHCI Host Double Port - Dual On-chip Transceivers - Integrated FIFOs and Dedicated DMA Channels USB 2.0 High Speed (480 Mbits per second) Device Port - On-chip Transceiver, 4 Kbyte Configurable Integrated DPRAM - Integrated FIFOs and Dedicated DMA...