The following content is an automatically extracted verbatim text
from the original manufacturer datasheet and is provided for reference purposes only.
View original datasheet text
Features
General
• Based on the ARM® SC100™ SecurCore™ 32-bit RISC Processor • Two Instruction Sets • • • • • • • • •
– ARM High-performance 32-bit Instruction Set – Thumb® High-code-density 16-bit Instruction Set 4-Gbyte Linear Address Space Von Neumann Load/Store Architecture – Single 32-bit Data Bus for Instructions and Data 3-stage Pipeline Architecture – Fetch, Decode and Execute Stages 8-bit, 16-bit, and 32-bit Data Types On-chip Programmable System Clock up to 50 MHz Very Low Power Consumption: – Industry Leader in MIPS/Watt – Low-power Idle and Power-down Modes Bond Pad Locations Conforming to ISO 7816-2 ESD Protection to ± 6000V Operating Ranges: 2.7V to 5.