AT91SC464384RCU Datasheet | Atmel

Features General - Based on the ARM® SC100™ Secure Core™ 32-bit RISC Processor - Two Instruction Sets - - - - - - - - - - ARM High-performance 32-bit Instruction Set - Thumb® High-code-density 16-bit Instruction Set Von Neumann Load/Store Architecture - Single 32-bit Data Bus for Instructions and Data 3-stage Pipeline Architecture - Fetch, Decode, and Execute Stages 8-bit, 16-bit, and 32-bit Data Types On-chip Programmable System Clock up to 38MHz Very Low Power Consumption - Industry Leader in MIPS/Watt - Low power Idle and Power down Modes Bond Pad Locations Confirming to ISO7816-2 ESD Protection to ±6000V Operating range: 1.62V to 5.5V pliant with GSM, 3G , PC Industry patible, EMV 32-bit Secure Microcontrollers AT91SC464384RCU Summary Memory - 464K Bytes of ROM Program Memory - 384K Bytes of EEPROM, Including 256 OTP Bytes - - - - - Typically More than 500,000 Write/Erase Cycles at a Temperature of 25°C - 10 Years Data Retention EEPROM Erase Only Mode Write EEPROM With or Without Autoerase 18K Bytes of RAM (2K Bytes shared with Adv X™ crypto processor) 32K Bytes of ROM dedicated to Atmel’s crypto Library Peripherals - One ISO 7816 Controller - Up to 625 Kbps at 5 MHz Single Wire Interface (Digital Interface to RF front end chip) Two 16-bit Timers Random Number Generator (RNG) 2-level, 15-vector Interrupt Controller Hardware DES and Triple DES (DPA Resistant) Checksum Accelerator CRC16 & 32 Engine 32-bit Cryptographic Accelerator for Public Key Operations - RSA, DSA, ECC, Diffie-Hellman - High performance Hardware Java Card Accelerator - - - - - - - - 6546A- SPD- 29Mar07 Note: This is a summary document. A plete document will be available under NDA. For more information, please contact your local Atmel sales office. .. Security - - - - - Dedicated Hardware for Protection Against SPA/DPA Attacks Protection Against Physical Attack Environmental Protection Systems Voltage, Frequency, Light, and Temperature Protection Systems Secure Memory Management/Access...