ALD Overview
Tri-state or Voltage Control Tri-state or No Connect Ground PECL, LVDS, or CMOS Output plimentary PECL,LVDS, or NC VDD Connection : PRELIMINARY 5.08 x 7.0 x 1.8mm | | | | | | | | | | | | | | | TRI-STATE PIN OPERATION: OUTPUT TYPE PECL (P) LVDS & CMOS (L, C) PECL1 (P1) PIN 1 LOGIC LEVEL 0 (Default) 1 0 1(Default) 0 1(Default) OUTPUT STATE Enabled Tri-state Tri-state Enabled Tri-state Enabled Connect to VDD from logic...
ALD Key Features
- Based on a proprietary digital multiplier
- 2.5V to 3.3V +/- 5% operation
- Tri-State Output
- Ceramic SMD, low profile package
- Low Phase Jitter
- 156.25MHz, 187.5MHz, and 212.5MHz