Description
The AS7C251MNTD32A/36A family is a high performance CMOS 32 Mbit synchronous Static Random Access Memory (SRAM) organized as 1,048,576 words × 32 or 36 bits and incorporates a LATE LATE Write.
Features
- Organization: 1,048,576 words × 32 or 36 bits.
- NTD™architecture for efficient bus operation.
- Fast clock speeds to 200 MHz.
- Fast clock to data access: 3.2/3.5/3.8 ns.
- Fast OE access time: 3.2/3.5/3.8 ns.
- Fully synchronous operation.
- pipelined mode www. DataSheet4U. com.
- Common data inputs and data outputs.
- Asynchronous output enable control Logic block diagram
A[19:0] 20 D.
- Available in 100-pin TQFP packages.
AS7C251MNTD32A Datasheet
