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AS7C33256PFS32A - (AS7C33256PFS32A / AS7C33256PFS36A) 3.3V 256K x 32/36 pipelined burst synchronous SRAM

General Description

The AS7C33256PFS32A and AS7C33256PFS36A are high-performance CMOS 8-Mbit Synchronous Static Random Access Memory (SRAM) devices organized as 262,144 words x 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

Key Features

  • Organization: 262,144 words x 32 or 36 bits.
  • Fast clock speeds to 166 MHz.
  • Fast clock to data access: 3.5/4.0 ns.
  • Fast OE access time: 3.5/4.0 ns.
  • Fully synchronous register-to-register operation.
  • Single-cycle deselect.
  • Asynchronous output enable control.
  • Available in100-pin TQFP.
  • Individual byte write and global write www. DataSheet4U. com.
  • Multipl.

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Datasheet Details

Part number AS7C33256PFS32A
Manufacturer Alliance Semiconductor Corporation
File Size 574.38 KB
Description (AS7C33256PFS32A / AS7C33256PFS36A) 3.3V 256K x 32/36 pipelined burst synchronous SRAM
Datasheet download datasheet AS7C33256PFS32A Datasheet

Full PDF Text Transcription for AS7C33256PFS32A (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for AS7C33256PFS32A. For precise diagrams, and layout, please refer to the original PDF.

November 2004 ® AS7C33256PFS32A AS7C33256PFS36A 3.3V 256K × 32/36 pipelined burst synchronous SRAM Features • Organization: 262,144 words x 32 or 36 bits • Fast clock spe...

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eatures • Organization: 262,144 words x 32 or 36 bits • Fast clock speeds to 166 MHz • Fast clock to data access: 3.5/4.0 ns • Fast OE access time: 3.5/4.0 ns • Fully synchronous register-to-register operation • Single-cycle deselect • Asynchronous output enable control • Available in100-pin TQFP • Individual byte write and global write www.DataSheet4U.com • • • • • • • Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.

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