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AS7C332MPFS18A - 3.3V 2M x 18 pipelined burst synchronous SRAM

Description

The AS7C332MPFS18A is a high-performance CMOS 32-Mbit Synchronous Static Random Access Memory (SRAM) device organized as 2,097,152 words × 18 bits.

It incorporates a two-stage register-register pipeline for highest frequency on any given technology.

Features

  • Organization: 2,097,152 words × 18 bits.
  • Fast clock speeds to 200 MHz.
  • Fast clock to data access: 3.1/3.5/3.8 ns.
  • Fast OE access time: 3.1/3.5/3.8 ns.
  • Fully synchronous register-to-register operation.
  • Single-cycle deselect.
  • Asynchronous output enable control.
  • Available in 100-pin TQFP package www. DataSheet4U. com.
  • Individual byte write and global write.
  • Mult.

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Datasheet preview – AS7C332MPFS18A

Datasheet Details

Part number AS7C332MPFS18A
Manufacturer Alliance Semiconductor Corporation
File Size 554.28 KB
Description 3.3V 2M x 18 pipelined burst synchronous SRAM
Datasheet download datasheet AS7C332MPFS18A Datasheet
Additional preview pages of the AS7C332MPFS18A datasheet.

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Full PDF Text Transcription

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December 2004 ® AS7C332MPFS18A 3.3V 2M × 18 pipelined burst synchronous SRAM Features • Organization: 2,097,152 words × 18 bits • Fast clock speeds to 200 MHz • Fast clock to data access: 3.1/3.5/3.8 ns • Fast OE access time: 3.1/3.5/3.8 ns • Fully synchronous register-to-register operation • Single-cycle deselect • Asynchronous output enable control • Available in 100-pin TQFP package www.DataSheet4U.com • Individual byte write and global write • • • • • • Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.
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