AS7C33512PFD18A - 3.3V 512K x 18 pipeline burst synchronous SRAM
Description
The AS7C33512PFD18A is a high performance CMOS 8-Mbit Synchronous Static Random Access Memory (SRAM) devices organized as 524,288 words × 18 bits and incorporate a pipeline for highest frequency on any given technology.
Features
Organization: 524,288 words × 18 bits.
Fast clock speeds to 166 MHz.
Fast clock to data access: 3.5/4.0 ns.
Fast OE access time: 3.5/4.0 ns.
Fully synchronous register-to-register operation.
Dual-cycle deselect.
Asynchronous output enable control www. DataSheet4U. com.
November 2004
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AS7C33512PFD18A
3.3V 512K × 18 pipeline burst synchronous SRAM Features
• Organization: 524,288 words × 18 bits • Fast clock speeds to 166 MHz • Fast clock to data access: 3.5/4.0 ns • Fast OE access time: 3.5/4.0 ns • Fully synchronous register-to-register operation • Dual-cycle deselect • Asynchronous output enable control www.DataSheet4U.com • Individual byte write and global write • Available in 100-pin TQFP package • • • • • • • Linear or interleaved burst control Snooze mode for reduced power-standby Common data inputs and data outputs Byte write enables Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.