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AS7C33512PFD36A - (AS7C33512PFD32A / AS7C33512PFD36A) 3.3V 512K x 32/36 pipelined burst synchronous SRAM

This page provides the datasheet information for the AS7C33512PFD36A, a member of the AS7C33512PFD32A (AS7C33512PFD32A / AS7C33512PFD36A) 3.3V 512K x 32/36 pipelined burst synchronous SRAM family.

Description

The AS7C33512PFD32A/36A is a high-performance CMOS 16-Mbit synchronous Static Random Access Memory (SRAM) device organized as 524,288 words x 32/36.

It incorporates a two-stage register-register pipeline for highest frequency on any given technology.

Features

  • Organization: 524,288 words × 32 or 36 bits Fast clock speeds to 166 MHz Fast clock to data access: 3.4/3.8 ns Fast OE access time: 3.4/3.8 ns Fully synchronous register-to-register operation Double-cycle deselect Asynchronous output enable control Available in 100-pin TQFP package.
  • Individual byte write and global write Multiple chip enables for ea.

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Datasheet Details

Part number AS7C33512PFD36A
Manufacturer Alliance Semiconductor Corporation
File Size 587.48 KB
Description (AS7C33512PFD32A / AS7C33512PFD36A) 3.3V 512K x 32/36 pipelined burst synchronous SRAM
Datasheet download datasheet AS7C33512PFD36A Datasheet
Additional preview pages of the AS7C33512PFD36A datasheet.

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Other Datasheets by Alliance Semiconductor Corporation
  • AS7C33512PFD32A - (AS7C33512PFD32A / AS7C33512PFD36A) 3.3V 512K x 32/36 pipelined burst synchronous SRAM
  • AS7C33512PFD18A - 3.3V 512K x 18 pipeline burst synchronous SRAM
  • AS7C33512PFS18A - 3.3V 512K x 18 pipeline burst synchronous SRAM
  • AS7C33512PFS32A - (AS7C33512PFS32A / AS7C33512PFS36A) 3.3V 512K x 32/36 pipelined burst synchronous SRAM
  • AS7C33512PFS36A - (AS7C33512PFS32A / AS7C33512PFS36A) 3.3V 512K x 32/36 pipelined burst synchronous SRAM
  • AS7C33512FT18A - 3.3V 512K x 18 Flow-through synchronous SRAM
  • AS7C33512FT32A - (AS7C33512FT32A / AS7C33512FT36A) 3.3V 512K x 32/36 Flow-through synchronous SRAM
  • AS7C33512FT36A - (AS7C33512FT32A / AS7C33512FT36A) 3.3V 512K x 32/36 Flow-through synchronous SRAM

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February 2005 ® AS7C33512PFD32A AS7C33512PFD36A 3.3V 512K × 32/36 pipelined burst synchronous SRAM Features • • • • • • • • Organization: 524,288 words × 32 or 36 bits Fast clock speeds to 166 MHz Fast clock to data access: 3.4/3.8 ns Fast OE access time: 3.4/3.8 ns Fully synchronous register-to-register operation Double-cycle deselect Asynchronous output enable control Available in 100-pin TQFP package • • • • • • • Individual byte write and global write Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.3V I/O operation with separate VDDQ Linear or interleaved burst control Snooze mode for reduced power-standby Common data inputs and data outputs www.DataSheet4U.
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