AS4C32M32MD1 Description
The AS4C32M32MD1 is a four bank mobile DDR DRAM organized as 4 banks x 8M x 32. It achieves high speed data transfer rates by employing a chip architecture that pre-fetches multiple bits and then synchronizes the output data to a system clock. All of the controls, address, circuits are synchronized with the positive edge of an externally sup-plied clock.
AS4C32M32MD1 Key Features
- Data rate Clock Frequency
- Ordering Information for ROHS pliant Products
- 2- Rev.1.0 Sep.2014