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AS4C64M16D1 Datasheet 64m X 16 Bit Ddr1 Synchronous Dram

Manufacturer: Alliance Semiconductor

Overview: AS4C64M16D1 Revision History AS4C64M16D1 – 66-pin TSOP II package Revision Rev 1.0 Rev 2 Details Preliminary datasheet Speed grade option changed -5(400MHz) to -6(333MHz) Date Sep 2014 Oct 2014 Confidential 1 Rev. 2.0 Oct. /2014 AS4C64M16D1 Confidential 64M x 16 bit DDR1 Synchronous DRAM (SDRAM) Advanced (Rev. 2.0, Oct.

General Description

The AS4C64M16D1 is a four bank DDR DRAM organized as 4 banks x 16Mbit x 16.

The AS4C64M16D1 achieves high speed data transfer rates by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock.

All of the controls, address, circuits are synchronized with the positive edge of an externally supplied clock.

Key Features

  • High speed data transfer rates with system frequency up to 200MHz - Data Mask for Write Control - Four Banks controlled by BA0 & BA1 - Programmable CAS Latency: 2, 2.5, 3 - Programmable Wrap Sequence: Sequential or Interleave - Programmable Burst Length: 2, 4, 8 for Sequential Type 2, 4, 8 for Interleave Type - Automatic and Controlled Precharge Command - Power Down Mode - Auto Refresh and Self Refresh - Refresh Interval: 8192 cycles/64 ms - Available in 66 Pin TSOP II - SSTL-2 Compatible I/Os -.

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