AS4C64M16D1 Description
The AS4C64M16D1 is a four bank DDR DRAM organized as 4 banks x 16Mbit x 16. The AS4C64M16D1 achieves high speed data transfer rates by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock. All of the controls, address, circuits are synchronized with the positive edge of an externally supplied clock.
AS4C64M16D1 Key Features
- Data Mask for Write Control
- Four Banks controlled by BA0 & BA1
- Programmable CAS Latency: 2, 2.5, 3
- Programmable Wrap Sequence
- Programmable Burst
- Automatic and Controlled Precharge mand
- Power Down Mode
- Auto Refresh and Self Refresh
- Refresh Interval: 8192 cycles/64 ms
- Available in 66 Pin TSOP II