Datasheet Details
| Part number | AS4C64M16D2 |
|---|---|
| Manufacturer | Alliance Semiconductor |
| File Size | 1.40 MB |
| Description | 1Gb (64M x 16 bit) DDRII Synchronous DRAM (SDRAM) |
| Datasheet |
 AS4C64M16D2 Datasheet
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General Description
Differential Clock: CK, CK# are driven by the system clock.
All SDRAM input signals are sampled on the crossing of positive edge of CK and negative edge of CK#.
Output (Read) data is referenced to the crossings of CK and CK# (both directions of crossing).
Key Features
- JEDEC Standard Compliant.
- JEDEC standard 1.8V I/O (SSTL_18-compatible).
- Power supplies: VDD & VDDQ = +1.8V ± 0.1V.
- Operating temperature: - Commercial (0 ~ 85°C) - Industrial (-40 ~ 95°C).
- Supports JEDEC clock jitter specification.
- Fully synchronous operation.
- Fast clock rate: 400MHz.
- Differential Clock, CK & CK#.
- Bidirectional single/differential data strobe -DQS & DQS#.
- 8 internal banks for concurrent op.