ASM5I2304A Datasheet PDF - Alliance Semiconductor 3.3 V Zero Delay Buffer Specs

ASM5I2304A - 3.3 V Zero Delay Buffer

Datasheet Summary

Description

ASM5P2304A is a versatile, 3.3V zero-delay buffer designed to distribute high-speed clocks in PC, workstation, datacom, telecom and other high-performance applications.

It is available in 8 pin package.

Features

Zero input - output propagation delay, adjustable by capacitive load on FBK input. Multiple configurations - Refer “ASM5P2304A www. DataSheet4U. com ASM5P2304A the REF pin. The PLL feedback is required to be driven to FBK pin, and can be obtained from one of the outputs. The input-to-output propagation delay is guaranteed to be less than 250pS, and the output-to-output skew is guaranteed to be less than 200pS. The ASM5P2304A has two banks of two outputs each. Multiple ASM5P2304A devices can acce.

Datasheet Details

Part number	ASM5I2304A
Manufacturer	Alliance Semiconductor
File Size	338.68 KB
Description	3.3 V Zero Delay Buffer
Datasheet	ASM5I2304A Datasheet
Additional preview pages of the ASM5I2304A datasheet.

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Full PDF Text Transcription

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September 2005 rev 1.4 3.3V Zero Delay Buffer Features Zero input - output propagation delay, adjustable by capacitive load on FBK input. Multiple configurations - Refer “ASM5P2304A www.DataSheet4U.com ASM5P2304A the REF pin. The PLL feedback is required to be driven to FBK pin, and can be obtained from one of the outputs. The input-to-output propagation delay is guaranteed to be less than 250pS, and the output-to-output skew is guaranteed to be less than 200pS. The ASM5P2304A has two banks of two outputs each. Multiple ASM5P2304A devices can accept the same input clock and distribute it. In this case the skew between the outputs of the two devices is guaranteed to be less than 500pS. The ASM5P2304A is available in two different Configurations Table”.

Published: May 9, 2008 |