ASM5I2309A Datasheet PDF - Alliance Semiconductor (ASM5I2305A / ASM5I2309A) 3.3 V Zero Delay Buffer Specs

ASM5I2309A - (ASM5I2305A / ASM5I2309A) 3.3 V Zero Delay Buffer

This page provides the datasheet information for the ASM5I2309A, a member of the ASM5I2305A (ASM5I2305A / ASM5I2309A) 3.3 V Zero Delay Buffer family.

Datasheet Summary

Description

ASM5P2309A is a versatile, 3.3V zero-delay buffer designed to distribute high-speed clocks.

It accepts one reference input and drives out nine low-skew clocks.

It is available in a 16-pin package.

Features

15MHz to 133MHz operating range, compatible with CPU and PCI bus frequencies. Zero input - output propagation delay. Multiple low-skew outputs.
www. DataSheet4U. com.
ASM5P2309A ASM5P2305A 133MHz frequencies, and has higher drive than the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The ASM5P2309A has two banks of four outputs each, which can be controlled by.

Datasheet Details

Part number	ASM5I2309A
Manufacturer	Alliance Semiconductor
File Size	427.28 KB
Description	(ASM5I2305A / ASM5I2309A) 3.3 V Zero Delay Buffer
Datasheet	ASM5I2309A Datasheet
Additional preview pages of the ASM5I2309A datasheet.

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Full PDF Text Transcription

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September 2005 rev 1.6 3.3V Zero Delay Buffer General Features 15MHz to 133MHz operating range, compatible with CPU and PCI bus frequencies. Zero input - output propagation delay. Multiple low-skew outputs. www.DataSheet4U.com ASM5P2309A ASM5P2305A 133MHz frequencies, and has higher drive than the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The ASM5P2309A has two banks of four outputs each, which can be controlled by the Select inputs as shown in the Select Input Decoding Table. The select input also allows the input clock to be directly applied to the outputs for chip and system testing purposes.

Published: May 9, 2008 |