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AD9520-0 - 12 LVPECL/24 CMOS Output Clock Generator

General Description

The AD9520-0 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO.

The on-chip VCO tunes from 2.53 GHz to 2.95 GHz.

An external 3.3 V/5 V VCO/VCXO of up to 2.4 GHz can also be used.

Key Features

  • Low phase noise, phase-locked loop (PLL).
  • On-chip VCO tunes from 2.53 GHz to 2.95 GHz.
  • Optional external 3.3 V/5 V VCO/VCXO to 2.4 GHz.
  • 1 differential or 2 single-ended reference inputs.
  • Accepts CMOS, LVDS, or LVPECL references to 250 MHz.
  • Accepts 16.62 MHz to 33.3 MHz crystal for reference input.
  • Optional reference clock doubler.
  • Reference monitoring capability.
  • Automatic/manual reference holdover and reference switchover modes, with revertive switc.

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Full PDF Text Transcription for AD9520-0 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for AD9520-0. For precise diagrams, and layout, please refer to the original PDF.

Data Sheet AD9520-0 12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.8 GHz VCO FEATURES ► Low phase noise, phase-locked loop (PLL) ► On-chip VCO tunes from 2.53...

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Low phase noise, phase-locked loop (PLL) ► On-chip VCO tunes from 2.53 GHz to 2.95 GHz ► Optional external 3.3 V/5 V VCO/VCXO to 2.4 GHz ► 1 differential or 2 single-ended reference inputs ► Accepts CMOS, LVDS, or LVPECL references to 250 MHz ► Accepts 16.62 MHz to 33.3 MHz crystal for reference input ► Optional reference clock doubler ► Reference monitoring capability ► Automatic/manual reference holdover and reference switchover modes, with revertive switching ► Glitch-free switchover between references ► Automatic recovery from holdover ► Digital or analog lock detect, selectable ► Optional zero delay operation ► Twelve

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