ADCMP606 Datasheet | Analog Devices

FEATURES Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply CML parators ADCMP606/ADCMP607 FUNCTIONAL BLOCK DIAGRAM VCCI VCCO (ADCMP607 Only) LE/HYS INPUT (ADCMP607 Only) APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Automatic test equipment (ATE) 12 Q SDN INPUT (ADCMP607 Only) Figure 1. 11 VEE 10 Q VCCO 1 VCCI 2 VEE 3 PIN 1 INDICATOR 9 VEE 8 LE/HYS 7 SDN ADCMP607 TOP VIEW (Not to Scale) Figure 2.LFCSP Pin Configuration GENERAL DESCRIPTION The ADCMP606/ADCMP607 are very fast parators fabricated on Analog Devices’ proprietary XFCB2 process. These parators are exceptionally versatile and easy to use. Features include an input range from VEE - 0.5 V to VCC + 0.5 V, low noise CML-patible output drivers, and TTL-/CMOSpatible latch inputs with adjustable hysteresis and/or shutdown inputs. The device offers 1 ns propagation delay with 2 ps RMS random jitter (RJ). Overdrive and slew rate dispersion are typically less than 50 ps. A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a - 0.5 V to +3.0 V input signal range up to a +5.5 V positive supply with a - 0.5 V to +6 V input signal range. The ADCMP607 features split input/output supplies with no sequencing restrictions to support a wide input signal range with independent output level control and power savings. The CML-patible output stage is fully back-matched for superior performance. The parator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. On the ADCMP607, high speed latch and programmable hysteresis features are also provided with a unique single-pin control option. The ADCMP606 is available in a...