ADCMP607 Datasheet PDF | Analog Devices

Analog Devices ADCMP607

The ADCMP607 features split input/output supplies with no sequencing restrictions to support a wide input signal range with independent output level control and power savings. The CML-compatible output stage is fully back-matched for superior performance. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded.

Part No.	ADCMP607
Datasheet	ADCMP607 Download
Manufacturer	Analog Devices
Description	Single-Supply CML Comparators
Buy	Stock & Price

FEATURES

Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply CML Comparators ADCMP606/ADCMP607 FUNCTIONAL BLOCK DIAGRAM VCCI VCCO (ADCMP607 Only) LE/HYS INPUT (ADCMP607 Only)

APPLICATIONS

High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Automatic test equipment (ATE) 12 Q SDN INPUT (ADCMP607 Only) Figure 1. 11 VEE 10 Q VCCO 1 VCCI 2 VEE 3 PIN 1 INDICATOR 9 VEE 8 LE/HYS 7 SDN ADCMP607 TOP VIEW (Not to Scale) Figure 2.LFCSP Pin Configuration

GENERAL DESCRIPTION

The ADCMP606/ADCMP607 are very fast comparators fabricated on Analog Devices’ proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use.

FEATURES

include an input range from VEE − 0.5 V to VCC + 0.5 V, low noise CML-compatible output drivers, and TTL-/CMOScompatible latch inputs with adjustable hysteresis and/or shutdown inputs.