ADCMP605 Datasheet PDF | Analog Devices

Analog Devices ADCMP605

the ADCMP605, support a wide input signal range with greatly reduced power consumption. The LVDS-compatible output stage is designed to drive any standard LVDS input. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded.

Part No.	ADCMP605
Datasheet	ADCMP605 Download
Manufacturer	Analog Devices
Description	Single-Supply LVDS Comparators
Buy	Stock & Price

FEATURES

Fully specified rail to rail at VCC = 2.5 V to 5.5 V Input common-mode voltage from −0.2 V to VCC + 0.2 V Low glitch LVDS-compatible output stage 1.6 ns propagation delay 37 mW at 2.5 V Shutdown pin Single-pin control for programmable hysteresis and latch Power supply rejection > 60 dB −40°C to +125°C operation FUNCTIONAL BLOCK DIAGRAM VCCI VCCO (ADCMP605 ONLY) VP NONINVERTING INPUT Q OUTPUT ADCMP604/ ADCMP605 VN INVERTING INPUT LVDS Q OUTPUT

APPLICATIONS

High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Automatic test equipment (ATE) LE/HYS INPUT SDN INPUT (ADCMP605 ONLY) Figure 1.

GENERAL DESCRIPTION

The ADCMP604 and ADCMP605 are very fast comparators fabricated on Analog Devices, Inc.’s, proprietary XFCB2 process. This family of comparators is exceptionally versatile and easy to use.