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ADSP-21266 - SHARC Embedded Processor

Description

3 Family Core Architecture 3 Memory and I/O Interface

Features

  • 4 Target Board JTAG Emulator Connector 8 Development Tools 8 Additional Information 9 Related Signal Chains 9 Pin Function.

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Datasheet Details

Part number ADSP-21266
Manufacturer Analog Devices
File Size 815.74 KB
Description SHARC Embedded Processor
Datasheet download datasheet ADSP-21266 Datasheet
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SHARC Embedded Processor ADSP-21261/ADSP-21262/ADSP-21266 SUMMARY High performance 32-bit/40-bit floating-point processor optimized for high performance audio processing Code compatibility—at assembly level, uses the same instruction set as other SHARC DSPs Processes high performance audio while enabling low system costs Audio decoders and postprocessor algorithms support nonvolatile memory that can be configured to contain a combination of PCM 96 kHz, Dolby Digital, Dolby Digital Surround EX, DTS-ES Discrete 6.1, DTS-ES Matrix 6.1, DTS 96/24 5.1, MPEG2 AAC LC, MPEG2 BC 2ch, WMAPRO V7.1, Dolby Pro Logic II, Dolby Pro Logic 2x, and DTS Neo:6 Various multichannel surround sound decoders are contained in ROM. For configurations of decoder algorithms, see Table 3 on Page 4.
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