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AS5SP1M36DQ - 36Mb Pipelined Sync SRAM

General Description

The AS5SP1M36DQ SRAM integrates 1M x 36/2M x 18 and 512K x 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.

All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK).

Key Features

  • Supports bus operation up to 200 MHz.
  • Available speed grades are 200 and 166 MHz.
  • Registered inputs and outputs for pipelined operation.
  • 3.3V core power supply.
  • 2.5V/3.3V I/O power supply.
  • Fast clock-to-output times.
  • Provide high-performance 3-1-1-1 access rate.
  • User-selectable burst counter supporting Intel®.
  • Pentium® interleaved or linear burst sequences.
  • Separate processor and controller address strobes.

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Datasheet Details

Part number AS5SP1M36DQ
Manufacturer Austin Semiconductor
File Size 427.96 KB
Description 36Mb Pipelined Sync SRAM
Datasheet download datasheet AS5SP1M36DQ Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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AUSTIN SEMICONDUCTOR, INC. Austin Semiconductor, Inc. 36Mb Pipelined Sync SRAM FEATURES • Supports bus operation up to 200 MHz • Available speed grades are 200 and 166 MHz • Registered inputs and outputs for pipelined operation • 3.3V core power supply • 2.5V/3.3V I/O power supply • Fast clock-to-output times • Provide high-performance 3-1-1-1 access rate • User-selectable burst counter supporting Intel® • Pentium® interleaved or linear burst sequences • Separate processor and controller address strobes • Synchronous self-timed writes • Asynchronous output enable • Single Cycle Chip Deselect • Available in lead-free 100-pin TQFP package • IEEE 1149.