AP2301 Overview
The AP2301 linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 1.5A current continuously, offers enough current for most DDR applications. Output voltage is designed to track the reference voltage within a 2% tolerance for load regulation while preventing shooting through on the output stage.
AP2301 Key Features
- Support Both DDR I (1.25VTT) and DDR II (0.9VTT) Requirements Source and Sink Current up to 1.5A High Accuracy Output Vo
