AP2302L Datasheet | BCD Semiconductor

Preliminary Datasheet 2A DDR TERMINATION REGULATOR General Description The AP2302L linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 2A current continuously, providing enough current for most DDR applications. VOUT is designed to track the VREF voltage within a ± 20mV tolerance over the entire current range while preventing shooting through on the output stage. On-chip thermal limiting provides protection against a bination of high current and ambient temperature which would create an excessive junction temperature. The AP2302L, used in conjunction with series termination resistors,...