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CEP6030L - N-Channel Logic Level Enhancement Mode Field Effect Transistor

Download the CEP6030L datasheet PDF. This datasheet also covers the CEP6030L_Chino variant, as both devices belong to the same n-channel logic level enhancement mode field effect transistor family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • 30V, 52A,RDS(ON) = 13.5mΩ @VGS = 10V. RDS(ON) = 20mΩ @VGS = 4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TO-220 & TO-263 package. D G S CEB SERIES TO-263(DD-PAK) G D S CEP SERIES TO-220 G D S.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CEP6030L_Chino-ExcelTechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number CEP6030L
Manufacturer Chino-Excel Technology
File Size 60.56 KB
Description N-Channel Logic Level Enhancement Mode Field Effect Transistor
Datasheet download datasheet CEP6030L Datasheet

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Other Datasheets by Chino-Excel Technology

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CEP6030LS2 N-Channel Logic Level Enhancement Mode Field Effect Transistor
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CEP6030L/CEB6030L N-Channel Enhancement Mode Field Effect Transistor FEATURES 30V, 52A,RDS(ON) = 13.5mΩ @VGS = 10V. RDS(ON) = 20mΩ @VGS = 4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TO-220 & TO-263 package. D G S CEB SERIES TO-263(DD-PAK) G D S CEP SERIES TO-220 G D S ABSOLUTE MAXIMUM RATINGS Tc = 25 C unless otherwise noted Parameter Symbol Limit Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Maximum Power Dissipation @ TC = 25 C - Derate above 25 C VDS VGS ID IDM PD 30 ±20 52 156 75 0.