Datasheet4U Logo Datasheet4U.com

CEP6031LS2 - N-Channel Logic Level Enhancement Mode Field Effect Transistor

This page provides the datasheet information for the CEP6031LS2, a member of the CEP6031LS2_Chino N-Channel Logic Level Enhancement Mode Field Effect Transistor family.

Datasheet Summary

Features

  • 30V , 60A , RDS(ON)=12m Ω @VGS=10V. RDS(ON)=17mΩ @VGS=4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-220 & TO-263 package. D G G D G S CEB SERIES TO-263(DD-PAK) G D S CEP SERIES TO-220 S.

📥 Download Datasheet

Datasheet preview – CEP6031LS2

Datasheet Details

Part number CEP6031LS2
Manufacturer Chino-Excel Technology
File Size 52.33 KB
Description N-Channel Logic Level Enhancement Mode Field Effect Transistor
Datasheet download datasheet CEP6031LS2 Datasheet
Additional preview pages of the CEP6031LS2 datasheet.
Other Datasheets by Chino-Excel Technology

Full PDF Text Transcription

Click to expand full text
CEP6031LS2/CEB6031LS2 March 1998 N-Channel Logic Level Enhancement Mode Field Effect Transistor FEATURES 30V , 60A , RDS(ON)=12m Ω @VGS=10V. RDS(ON)=17mΩ @VGS=4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-220 & TO-263 package. D G G D G S CEB SERIES TO-263(DD-PAK) G D S CEP SERIES TO-220 S ABSOLUTE MAXIMUM RATINGS (TC=25 C unless otherwise noted) Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage VGS Drain Current-Continuous @TJ=125 C -Pulsed ID IDM Drain-Source Diode Forward Current IS Maximum Power Dissipation @Tc=25 C Derate above 25 C PD 15 Operating and StorageTemperature Range TJ, TSTG Limit 30 Ć 20 60 180 60 50 0.
Published: |