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CS2500 - Fractional-N Clock Synthesizer and Multiplier

General Description

The CS2500 is a system-clocking device incorporating a programmable phase-locked loop (PLL).

The hybrid analog/ digital PLL architecture comprises a delta-sigma fractional-N analog PLL and a digital frequency-locked loop (FLL).

Key Features

  • I²C/SPI control port.
  • Clock frequency synthesizer incorporating delta-sigma fractional-N analog PLL.
  • Generates low-jitter 6.
  • 75 MHz clock (CLK_OUT) from 8.
  • 75 MHz timing reference (REF_CLK_IN).
  • Fractional clock multiplier and jitter reduction using hybrid analog/digital PLL.
  • Generates low-jitter 6.
  • 75 MHz clock (CLK_OUT), synchronized to a 50 Hz.
  • 30 MHz low-quality or intermittent frequency reference (CLK_IN).

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Datasheet Details

Part number CS2500
Manufacturer Cirrus Logic
File Size 367.75 KB
Description Fractional-N Clock Synthesizer and Multiplier
Datasheet download datasheet CS2500 Datasheet

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Other Datasheets by Cirrus Logic

Part Number Description
CS2501 Fractional-N Clock Multiplier
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CS2500 Fractional-N Clock Synthesizer and Multiplier Features • I²C/SPI control port • Clock frequency synthesizer incorporating delta-sigma fractional-N analog PLL — Generates low-jitter 6–75 MHz clock (CLK_OUT) from 8–75 MHz timing reference (REF_CLK_IN) • Fractional clock multiplier and jitter reduction using hybrid analog/digital PLL — Generates low-jitter 6–75 MHz clock (CLK_OUT), synchronized to a 50 Hz–30 MHz low-quality or intermittent frequency reference (CLK_IN) • Configurable auxiliary clock/status output • Minimal board space required — No external analog loop-filter components • Pin-to-pin, register map, and control compatible with CS2000 and CS2200 • Single-supply operation at 1.8 V or 3.