CY28351 - Differential Clock Buffer/Driver

Product Overview

Cypress Semiconductor

Datasheet Details

Part number	CY28351
Manufacturer	Cypress Semiconductor
File Size	71.38 KB
Description	Differential Clock Buffer/Driver
Datasheet	CY28351 Datasheet
Additional preview pages of the CY28351 datasheet.

Product details

Description

This PLL clock buffer is designed for 2.5-VDD and 2.5-AVDD operation and differential outputs levels.

This device is a zero delay buffer that distributes a clock input (CLKIN) to ten differential pairs of clock outputs (YT[0:9], YC[0:9]) and one feedback clock output (FBOUT).

Features

Supports 333-MHz and 400-MHz DDR SDRAM.
60-.
200-MHz operating frequency.
Phase-locked loop (PLL) clock distribution for double data rate synchronous DRAM.

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Other Datasheets by Cypress Semiconductor

CY28352 - Differential Clock Buffer/Driver
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Published: Aug 31, 2014 |