CY7C09199 Datasheet | Cypress

.. 25/0251 CY7C09089/99 CY7C09189/99 64K/128K x 8/9 Synchronous Dual-Port Static RAM Features - True dual-ported memory cells which allow simultaneous access of the same memory location - Six Flow-Through/Pipelined devices - 64K x 8/9 organizations (CY7C09089/189) - 128K x 8/9 organizations (CY7C09099/199) - Three Modes - Flow-Through - Pipelined - Burst - Pipelined output mode on both ports allows fast 100MHz cycle time - 0.35-micron CMOS for optimum speed/power - High-speed clock to data access 6.5[1]/7.5/9/12 ns (max.) - Low operating power - Active = 195 m A (typical) - Standby = 0.05 m A (typical) - Fully synchronous interface for easier operation - Burst counters increment addresses internally - Shorten cycle times - Minimize bus noise - - - - - - Supported in Flow-Through and Pipelined modes Dual Chip Enables for easy depth expansion Automatic power-down mercial and Industrial temperature ranges Available in 100-pin TQFP Pin-patible and functionally equivalent to IDT70908 and IDT709089 Logic Block Diagram R/WL OEL R/WR OER CE0L...