CY7C09199V Datasheet | Cypress

.. 25/0251 CY7C09079V/89V/99V CY7C09179V/89V/99V 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM Features - True Dual-Ported memory cells which allow simultaneous access of the same memory location - 6 Flow-Through/Pipelined devices - 32K x 8/9 organizations (CY7C09079V/179V) - 64K x 8/9 organizations (CY7C09089V/189V) - 128K x 8/9 organizations (CY7C09099V/199V) - 3 Modes - Flow-Through - Pipelined - Burst - Pipelined output mode on both ports allows fast 100-MHz operation - 0.35-micron CMOS for optimum speed/power v - High-speed clock to data access 6.5[1]/7.5[1]/9/12 ns (max.) - 3.3V low operating power - Active= 115 m A (typical) - Standby= 10 µA (typical) - Fully synchronous interface for easier operation - Burst counters increment addresses internally - Shorten cycle times - Minimize bus noise - - - - - Supported in Flow-Through and Pipelined modes Dual Chip Enables for easy depth expansion Automatic power-down mercial and Industrial temperature ranges Available in 100-pin TQFP Logic Block Diagram R/WL OEL R/WR OER CE0L...