Datasheet Summary
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128Kx36 Flow-Through SRAM with NoBL™ Architecture
Features
- Pin patible and functionally equivalent to ZBT™ devices IDT71V547, MT55L128L36F, and MCM63Z737
- Supports 66-MHz bus operations with zero wait states
- Data is transferred on every clock
- Internally self-timed output buffer control to eliminate the need to use OE
- Registered inputs for Flow-Through operation
- Byte Write capability
- 128K x 36 mon I/O architecture
- Single 3.3V power supply
- Fast clock-to-output times
- 11.0 ns (for 66-MHz device)
- 12.0 ns (for 50-MHz device)
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- - 14.0 ns (for 40-MHz device) Clock Enable (CEN) pin to suspend operation Synchronous self-timed writes...