CY7C1354BV25 - 256K x 36/512K x 18 Pipelined SRAM with NoBL Architecture

Product Overview

Cypress Semiconductor

Datasheet Details

Part number	CY7C1354BV25
Manufacturer	Cypress Semiconductor
File Size	518.38 KB
Description	256K x 36/512K x 18 Pipelined SRAM with NoBL Architecture
Datasheet	CY7C1354BV25 Datasheet
Additional preview pages of the CY7C1354BV25 datasheet.

Product details

Description

The CY7C1354BV25 and CY7C1356BV25 are 2.5V, 256K x 36 and 512K x 18 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL) logic, respectively.

Features

Pin-compatible and functionally equivalent to ZBT™.
Supports 225-MHz bus operations with zero wait states.
Available speed grades are 225, 200 and 166 MHz.
Internally self-timed output buffer control to eliminate the need to use asynchronous OE.
Fully registered (inputs and outputs) for pipelined operation.
Byte Write capability.
Single 2.5V power supply.
Fast clock-to-output times.
2.8 ns (for 225-MHz device).

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Other Datasheets by Cypress Semiconductor

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Published: Mar 27, 2005 |