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CY7C1415BV18 Datasheet (cy7c14xxbv18) 36-mbit Qdr-ii Sram 4-word Burst Architecture

Manufacturer: Cypress (now Infineon)

Overview: CY7C1411BV18, CY7C1426BV18 .. CY7C1413BV18, CY7C1415BV18 36-Mbit QDR™-II SRAM 4-Word Burst.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The CY7C1411BV18, CY7C1426BV18, CY7C1413BV18, and CY7C1415BV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture.

QDR-II architecture consists of two separate ports to access the memory array.

The read port has dedicated data outputs to support the read operations and the write port has dedicated data inputs to support the write operations.

Key Features

  • Configurations CY7C1411BV18.
  • 4M x 8 CY7C1426BV18.
  • 4M x 9 CY7C1413BV18.
  • 2M x 18 CY7C1415BV18.
  • 1M x 36 Separate independent read and write data ports.
  • Supports concurrent transactions 300 MHz clock for high bandwidth 4-word burst for reducing address bus frequency Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 600 MHz) at 300 MHz Two input clocks (K and K) for precise DDR timing.
  • SRAM uses rising edges only.

More Datasheets from Cypress (now Infineon)

Part Number Description
CY7C1415AV18 (CY7C14xxAV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1415JV18 (CY7C14xxJV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1415KV18 36-Mbit QDR II SRAM Four-Word Burst Architecture
CY7C141 1K x 8 Dual-Port Static RAM
CY7C1410AV18 (CY7C14xxAV18) 36-Mbit QDR-II SRAM 2-Word Burst Architecture
CY7C1410JV18 (CY7C14xxJV18) SRAM 2-Word Burst Architecture
CY7C1410V18 (CY7C14xxV18) SRAM 2-Word Burst Architecture
CY7C1411AV18 (CY7C14xxAV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1411BV18 (CY7C14xxBV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1411JV18 (CY7C14xxJV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture

CY7C1415BV18 Distributor