CY7C1462AV33 Overview
They are designed to support unlimited true back-to-back read/write operations with no wait states. The CY7C1460AV33/CY7C1462AV33 are equipped with the advanced (NoBL) logic required to enable consecutive read/write operations with data being transferred on every clock cycle.
CY7C1462AV33 Key Features
- Pin patible and functionally equivalent to ZBT
- Supports 250 MHz bus operations with zero wait states
- Available speed grades are 250, 200 and 167 MHz
- Internally self timed output buffer control to eliminate the need
- Fully registered (inputs and outputs) for pipelined operation
- Byte write capability
- 3.3 V power supply
- 3.3 V/2.5 V I/O power supply
- Fast clock-to-output times
- 2.6 ns (for 250 MHz device)