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CY7C1462KVE33 Datasheet 36-mbit (1m X 36/2m X 18) Pipelined Sram

Manufacturer: Cypress (now Infineon)

Overview: CY7C1460KV33 CY7C1460KVE33 CY7C1462KVE33 36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™ Architecture (With ECC) 36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™ Architecture (With.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Key Features

  • Pin-compatible and functionally equivalent to Zero Bus Turnaround (ZBT™).
  • Supports 250-MHz bus operations with zero wait states.
  • Available speed grades are 250, 200, and 167 MHz.
  • Internally self-timed output buffer control to eliminate the need to use asynchronous OE.
  • Fully-registered (inputs and outputs) for pipelined operation.
  • Byte write capability.
  • 3.3-V power supply.
  • 3.3-V/2.5-V I/O power supply.
  • Fast clock-to-output time.
  • 2.5 ns (for 250-M.

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