CY7C147 Overview
(WE) inputs are both LOW. Data on the input pin (DI) is written into the memory location specified on the address pins (A 0 through A 11). Readingthedeviceisacplished bytakĆ ingthechipenable(CE)LOWwhile(WE) remains HIGH.
CY7C147 datasheet by Cypress (now Infineon).
| Part number | CY7C147 |
|---|---|
| Datasheet | CY7C147_CypressSemiconductor.pdf |
| File Size | 407.33 KB |
| Manufacturer | Cypress (now Infineon) |
| Description | 4K x 1 STATIC RAM |
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(WE) inputs are both LOW. Data on the input pin (DI) is written into the memory location specified on the address pins (A 0 through A 11). Readingthedeviceisacplished bytakĆ ingthechipenable(CE)LOWwhile(WE) remains HIGH.
View all Cypress (now Infineon) datasheets
| Part Number | Description |
|---|---|
| CY7C1470BV25 | (CY7C147xBV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM |
| CY7C1470BV33 | 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM |
| CY7C1470V25 | 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM |
| CY7C1470V33 | (CY7C147xV33) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM |
| CY7C1471BV25 | 72-Mbit (2 M x 36) Flow-Through SRAM |
| CY7C1471BV33 | 72-Mbit (2 M x 36/4 M x 18) Flow-Through SRAM |
| CY7C1471V25 | (CY7C147xV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM |
| CY7C1471V33 | (CY7C147xV33) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM |
| CY7C1472BV25 | (CY7C147xBV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM |
| CY7C1472BV33 | 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM |