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CY7C1470BV25 - (CY7C147xBV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM

General Description

The CY7C1470BV25, CY7C1472BV25, and CY7C1474BV25 are 2.5V, 2M x 36/4M x 18/1M x 72 synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively.

They are designed to support unlimited true back-to-back read or write operations with no wait states.

Key Features

  • Functional.

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Other Datasheets by Cypress (now Infineon)

Part Number Description
CY7C1470BV33 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM
CY7C1470V25 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM
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CY7C1471BV25 72-Mbit (2 M x 36) Flow-Through SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CY7C1470BV25 CY7C1472BV25, CY7C1474BV25 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL™ Architecture Features ■ ■ Functional Description The CY7C1470BV25, CY7C1472BV25, and CY7C1474BV25 are 2.5V, 2M x 36/4M x 18/1M x 72 synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back read or write operations with no wait states. The CY7C1470BV25, CY7C1472BV25, and CY7C1474BV25 are equipped with the advanced (NoBL) logic required to enable consecutive read or write operations with data being transferred on every clock cycle. This feature dramatically improves the throughput of data in systems that require frequent read or write transitions.