| Part number | CY7C1916CV18 |
|---|---|
| Download | CY7C1916CV18 Datasheet (PDF) |
| File Size | 718.02 KB |
| Manufacturer | Cypress |
| Description | (CY7C1xxxCV18) 18-Mbit DDR-II SRAM 2-Word Burst Architecture |
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| Part Number | Description |
|---|---|
| CY7C1916BV18 | 18-Mbit DDR-II SRAM 2-Word Burst Architecture |
| CY7C1916JV18 | 18-Mbit DDR-II SRAM 2-Word Burst Architecture |
| CY7C1916KV18 | 18-Mbit DDR II SRAM Two-Word Burst Architecture |
| CY7C1910BV18 | 1.8V Synchronous Pipelined SRAM |
| CY7C1911BV18 | (CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture |
The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and write are latched on alternate rising edges of the input (K) clock. Write data is registered on the rising edges of both K.
