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CY23FP12 - 200MHz Field Programmable Zero Delay Buffer

General Description

The CY23FP12 is a high performance fully field-programmable 200 MHz zero delay buffer designed for high speed clock distribution.

The integrated PLL is designed for low jitter and optimized for noise rejection.

Key Features

  • Fully field-programmable.
  • Input and output dividers.
  • Inverting/non-inverting outputs.
  • Phase-locked loop (PLL) or fanout buffer configuration.
  • 10 MHz to 200 MHz operating range.
  • Split 2.5 V or 3.3 V outputs.
  • Two LVCMOS reference inputs.
  • Twelve low skew outputs.
  • 35 ps typical output-to-output skew (same frequency).
  • 110 ps typical cycle-cycle jitter (same frequency).
  • Three-stateable outputs.
  • Less than 50 A shutdown current.
  • Spread a.

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Other Datasheets by Cypress (now Infineon)

Part Number Description
CY23FS08 2.5V / 3.3V Zero Delay Buffer
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CY2305 Low Cost 3.3 V Zero Delay Buffer
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CY23FP12 200 MHz Field Programmable Zero Delay Buffer 200 MHz Field Programmable Zero Delay Buffer Features ■ Fully field-programmable ❐ Input and output dividers ❐ Inverting/non-inverting outputs ❐ Phase-locked loop (PLL) or fanout buffer configuration ■ 10 MHz to 200 MHz operating range ■ Split 2.5 V or 3.3 V outputs ■ Two LVCMOS reference inputs ■ Twelve low skew outputs ❐ 35 ps typical output-to-output skew (same frequency) ■ 110 ps typical cycle-cycle jitter (same frequency) ■ Three-stateable outputs ■ Less than 50 A shutdown current ■ Spread aware ■ 28-pin SSOP ■ 3.3 V operation ■ Industrial temperature available Functional Description The CY23FP12 is a high performance fully field-programmable 200 MHz zero delay buffer designed for high speed clock distribution.