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CY23FP12 Datasheet 200mhz Field Programmable Zero Delay Buffer

Manufacturer: Cypress (now Infineon)

Overview: CY23FP12 200 MHz Field Programmable Zero Delay Buffer 200 MHz Field Programmable Zero Delay.

General Description

The CY23FP12 is a high performance fully field-programmable 200 MHz zero delay buffer designed for high speed clock distribution.

The integrated PLL is designed for low jitter and optimized for noise rejection.

These parameters are critical for reference clock distribution in systems using high performance ASICs

Key Features

  • Fully field-programmable.
  • Input and output dividers.
  • Inverting/non-inverting outputs.
  • Phase-locked loop (PLL) or fanout buffer configuration.
  • 10 MHz to 200 MHz operating range.
  • Split 2.5 V or 3.3 V outputs.
  • Two LVCMOS reference inputs.
  • Twelve low skew outputs.
  • 35 ps typical output-to-output skew (same frequency).
  • 110 ps typical cycle-cycle jitter (same frequency).
  • Three-stateable outputs.
  • Less than 50 A shutdown current.
  • Spread a.

More Datasheets from Cypress (now Infineon)

Part Number Description
CY23FS08 2.5V / 3.3V Zero Delay Buffer
CY2304 3.3V Zero Delay Buffer
CY2304NZ Four Output PCI-X and General Purpose Buffer
CY2305 Low Cost 3.3 V Zero Delay Buffer
CY2308 3.3V Zero Delay Buffer
CY2309 Low Cost 3.3 V Zero Delay Buffer
CY23EP05 5 Output Zero Delay Buffer
CY23EP09 Nine-Output Zero Delay Buffer
CY23S02 Frequency Multiplier and Zero Delay Buffer
CY23S05 Low Cost 3.3V Spread Aware Zero Delay Buffer

CY23FP12 Distributor