CY7C1383D - 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

This page provides the datasheet information for the CY7C1383D, a member of the CY7C1381D 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM family.

Product Overview

Cypress

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Datasheet Details

Part number	CY7C1383D
Manufacturer	Cypress
File Size	1.29 MB
Description	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM
Datasheet	CY7C1383D Datasheet
Additional preview pages of the CY7C1383D datasheet.

CY7C1383D Product details

Description

The CY7C1381D/CY7C1383D/CY7C1383F is a 3.3 V, 512K × 36 and 1M × 18 synchronous flow through SRAMs, designed to interface with high speed microprocessors with minimum glue logic.

Maximum access delay from clock rise is 6.5 ns (133 MHz version).

Features

Supports 133 MHz bus operations.
512K × 36 and 1M × 18 common I/O.
3.3 V core power supply (VDD).
2.5 V or 3.3 V I/O supply (VDDQ).
Fast clock-to-output time.
6.5 ns (133 MHz version).
Provides high performance 2-1-1-1 access rate.
User selectable burst counter supporting Intel Pentium interleaved or linear burst sequences.
Separate processor and controller address strobes.
Synchronous self-timed write.
Asynchronous output enable.
CY7C.

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Published: Oct 2, 2016 |