CY7C138
Overview
- True Dual-Ported memory cells that allow simultaneous reads of the same memory location
- 4K x 8 organization (CY7C138)
- 4K x 9 organization (CY7C139)
- 0.65-micron CMOS for optimum speed/power
- High-speed access: 15 ns
- Low operating power: ICC = 160 mA (max.)
- Fully asynchronous operation
- Automatic power-down
- TTL compatible
- Expandable data bus to 32/36 bits or more using Master/Slave chip select when using more than one device
