M15F1G1664A-DEBG2CS
Overview
The 1Gb Double-Data-Rate-3 (DDR3) DRAM is do.
- Interface and Power Supply
- SSTL_15: VDD/VDDQ = 1.5V(±0.075V)
- JEDEC DDR3 Compliant
- 8n Prefetch Architecture
- Differential Clock (CK/ CK ) and Data Strobe (DQS/ DQS )
- Double-data rate on DQs, DQS and DM
- Data Integrity
- Auto Refresh and Self Refresh Modes
- Power Saving Mode
- Partial Array Self Refresh(PASR)
