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M53D64164A-4.5BG2C Datasheet 1m X16 Bit X 4 Banks Mobile Ddr Sdram

Manufacturer: ESMT (Elite Semiconductor Microelectronics Technology)

Overview: ESMT Mobile DDR SDRAM.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

Ball Name Function A0~A11, BA0~BA1 Address inputs - Row address A0~A11 - Column address A0~ A7 A10/AP : AUTO Precharge BA0~BA1 : Bank selects

Key Features

  • JEDEC Standard Internal pipelined double-data-rate architecture, two data access per clock cycle Bi-directional data strobe (DQS) No DLL; CLK to DQS is not synchronized. Differential clock inputs (CLK and CLK ) Four bank operation CAS Latency : 2, 3 Burst Type : Sequential and Interleave Burst Length : 2, 4, 8 Special function support - DS (Drive Strength) - Deep Power Down Mode (DPD Mode) M53D64164A (2C) 1M x16 Bit x 4 Banks Mobile DDR SDRAM All inputs except data & DM are sampled at the risin.

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