ES9826 Datasheet | ESS Technology

FEATURE +123d B DNR per channel (w/ ARE) +115d B DNR per channel (w/o ARE) -105d B THD+N per channel High Sample Rates Auto Ranging Enhancement (ARE) Customizable filter characteristics Programmable gain amplifier (PGA) w/ selectable input impedance Programmable microphone bias (MIC Bias) Integrated Analog PLL Multiple Output formats available I2C, SPI, and Hardware interface control Ultra-Low Noise Floor Bandwidth Integrated low noise ADC reference regulators Low Power Consumption Low Pin Count Standardized Packaging DESCRIPTION Unprecedented dynamic range and very low distortion Up to PCM 768k Hz through I2S and TDM output Optional feature for enhancing performance 8 presets of digital optimal filters PGA frontend with +0-30d B gain in 3d B steps with 2.5kΩ or 10kΩ input impedance Integrated programmable microphone bias regulator for BOM reduction costs Stereo PDM digital microphones are also supported Improved low jitter Analog PLL to generate clock and eliminate need for oscillator. PCM, TDM, and S/PDIF outputs are available. Configured by microcontroller or other I2C/SPI source, or set mode through Hardware Mode to avoid programming registers. 200k Hz bandwidth enabling higher resolution at higher sample rates Reduced BOM cost, PCB area and improved DNR if required Simplifies power supply design 5mm x 5mm, 28 pin QFN ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 - .ESSTECH. VERSION 0.1.2 ES9826 Datasheet Table of Contents Table of Contents...